This invention relates to integrated circuits, and more particularly, to isolation structures on integrated circuits such as programmable logic device integrated circuits that allow different body biases to be applied to different regions of circuitry.
The performance of modern integrated circuits is often limited by power consumption considerations. Circuits with poor power efficiency place undesirable demands on system designers. Power supply capacity may need to be increased, thermal management issues may need to be addressed, and circuit designs may need to be altered to accommodate inefficient circuitry.
Integrated circuits often use complementary metal-oxide-semiconductor (CMOS) transistor technology. CMOS integrated circuits have n-channel metal-oxide-semiconductor (NMOS) and p-channel metal-oxide-semiconductor (PMOS) transistors. To address power consumption concerns, designers of integrated circuits are beginning to consider selectively controlling leakage currents in NMOS and PMOS transistors.
NMOS and PMOS transistors have four terminals—a drain, a source, a gate, and a body. The body terminal, which is sometimes referred to as the well or bulk terminal, can be biased. For example, a negative bias voltage can be applied to the p-type body of an NMOS transistor or a bias voltage that is increased somewhat relative to a positive power supply voltage may be applied to the n-type body of a PMOS transistor. These bias voltages, which are sometimes referred to as reverse body biases, increase the threshold voltages of the transistors and thereby reduce their leakage currents. Reductions in leakage current can be achieved that reduce power consumption at the expense of reduced switching speed. If desired, forward body bias arrangements can be used to decrease the threshold voltages of MOS transistors and thereby improve performance at the expense of increased leakage currents.
It may be desirable to selectively control the leakage currents and performance associated with transistors in different portions of an integrated circuit. For example, it may be desirable to apply one body bias voltage to the body terminals of transistors in one part of a circuit while applying another body bias voltage to the body terminals of transistors in another part of the integrated circuit. By proper selection of the body bias voltages, power consumption may be reduced without adversely affecting circuit performance in critical circuit blocks.
In order to ensure that transistors in different regions of circuitry can have body terminals with different bias voltages, the body terminals in the different regions of circuitry must be isolated from each other. Care must be taken, however, that the isolation structures that are formed are not excessively large. Isolation structures that are not efficient may consume large amounts of circuit real estate. This, in turn, may significantly limit the degree of granularity that may be provided when implementing a selective body bias adjustment scheme on an integrated circuit.
It would therefore be desirable to provide ways in which to isolate transistor body regions from each other on an integrated circuit.